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dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 1 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 1 pc charge injection, 100 pa leakage, +5 v / +3 v, dual spst analog switches description the dg9232e, dg9233e, and dg9234e are monolithic cmos switches designed for precision signal switching. the 17 ? low voltage parts feature low charge injection, leakage, parasitic capacitance, and fast switching. the dg9232e, dg9233e, and dg9234e can switch both analog and digital signals. each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. the dg9232e, dg9233e, and dg9234e contain two independent single pole single throw (spst) switches. switch-1 and switch-2 are normally closed for the dg9232e and normally open for the dg9233e. for the dg9234e, switch-1 is normally open an d switch-2 is normally closed with a break-before-ma ke switching timing. the dg9232e, dg9233e, and dg 9234e offer 1 nw typical power consumption and 8 kv esd/hbm, 1 kv esd/cdm tolerance. they are the ideal switches for use in low voltage instruments and healthcare devices, fitting the circuits of low voltage adc and dac, sample and hold, analog front end gain control, and signal path control. the dg9232e, dg9233e, and dg9234e are available in 8-lead msop and soic packages. benefits ? low charge injection and leakage ? low parasitic capacitance ? fast switching speed ? high esd tolerance features ? 1 pc charge injection ? guaranteed 100 pa maximum switch on leakage at 25 c ? 3.8 pf switch off and 7.8 pf switch on capacitances ? +2.7 v to +5 v sing le supply operation ? low on-resistance - r ds(on) : 17 ? / typ. at 5 v ?t on : 32 ns, t off : 10 ns switching time ? typical power consumption: 1 nw ? over voltage tolerant ttl / cmos compatible ? esd (hbm): 8000 v, esd (cdm): 1000 v ? latch-up current: > 300 ma (jesd78) ? available in msop-8 and soic-8 ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 note ? * this datasheet provides information about parts that are ? rohs-compliant and / or parts th at are non-rohs-compliant. for ? example, parts with lead (pb) te rminations are not rohs-compliant. ? please see the information / tables in this datasheet for details. applications ? automatic test equipment ? process control and automation ? data acquisition systems ? meters and instruments ? medical and healthcare systems ? communication systems ? sample-and-hold systems ? relay replacements ? battery powered systems available available
dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 2 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 functional block diagram and pin configuration logic 0 ? 0.8 v ? logic 1 ? 2.4 v logic 0 ? 0.8 v ? logic 1 ? 2.4 v logic 0 ? 0.8 v ? logic 1 ? 2.4 v notes a. signals on nc, no, or com or in exceeding v+ will be clamped by internal diodes. limit forwar d diode current to maximum curre nt ratings. b. all leads welded or soldered to pc board. c. derate 6.5 mw/c above 70 c. stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. nc 1 v+ com 1 in 1 in 2 com 2 gnd nc 2 1 2 3 4 8 7 6 5 top view no 1 v+ com 1 in 1 in 2 com 2 gnd no 2 1 2 3 4 8 7 6 5 top view v+ gnd 1 2 3 4 8 7 6 5 top view no 1 com 1 in 1 in 2 com 2 nc 2 truth table - dg9232e logic switch 0 on 1off truth table - dg9233e logic switch 0 off 1on truth table - dg9234e logic switch-1 switch-2 0 off on 1onoff ordering information temperature range configuration package part number minimum order / package quantity -40 c to +85 c lead (pb)-free dg9232e 8-pin msop dg9232edq-t1-ge3 tape and reel 2500 units 8-pin soic dg9232edy-t1-ge3 tape and reel 2500 units 8-pin soic dg9232edy-ge3 tube 500 units dg9233e 8-pin msop dg9233edq-t1-ge3 tape and reel 2500 units 8-pin soic dg9233edy-t1-ge3 tape and reel 2500 units 8-pin soic dg9233edy-ge3 tube 500 units dg9234e 8-pin msop dg9234edq-t1-ge3 tape and reel 2500 units 8-pin soic DG9234EDY-T1-GE3 tape and reel 2500 units 8-pin soic dg9234edy-ge3 tube 500 units absolute maximum ratings parameter limit unit reference v+ to gnd -0.3 to +6 v in, com, nc, no a -0.3 to (v+ + 0.3) continuous current (any terminal) 20 ma peak current (pulsed at 1 ms, 10 % duty cycle) 40 esd (hbm) (mil-std-883, method 3015) > 8000 v esd (cdm) (ansi / esda / jedec ? js-002) > 1000 v latch up current, per jesd78 300 ma storage temperature d suffix -65 to +125 c power dissi pation (packages) b 8-pin narrow body soic c 400 mw
dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 3 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet. d. guarantee by design, nor su bjected to production test. e. v in = input voltage to pe rform proper function. f. difference of min. and max. values. g. guaranteed by 5 v leakage te sts, not production tested. specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v in = 0.8 v or 2.4 v e temp. a d suffix -40 c to +85 c unit min. c typ. b max. c analog switch analog signal range d v analog full 0 - 3 v drain-source on-resistance r ds(on) v no or v nc = 1.5 v, v+ = 2.7 v i com = 5 ma room - 35 50 ? full - 35 65 r ds(on) match d ? r ds(on) v no or v nc = 1.5 v room - 0.4 2 r ds(on) flatness d r ds(on) flatness v no or v nc = 1 v and 2 v room - 4 8 no or nc off leakage current g i no/nc(off) v no or v nc = 1 v/2 v, v com = 2 v/1 v room -100 5 100 pa full -5000 5 5000 com off leakage current g i com(off) v com = 1 v/2 v, v no or v nc = 2 v/1 v room -100 5 100 full -5000 5 5000 channel-on leakage current g i com(on) v com = v no or v nc = 1 v/2 v room -200 5 200 full -10 000 5 10 000 digital control input current i inl or i inh full - 0.001 - a dynamic characteristics turn-on time t on v no or v nc = 1.5 v room - 43 120 ns full - - 200 turn-off time t off room - 16 50 full - - 120 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 ? room - -0.28 - pc off-isolation oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room - -80 - db crosstalk x talk room - -108 - nc and no capacitance c s(off) f = 1 mhz room - 4 - pf channel-on capacitance c com(on) room - 8 - com-off capacitance c com(off) room - 4 - power supply positive supply range v+ 2.7 - 5.5 v power supply current i+ v+ = 3.3 v, v in = 0 v or 3.3 v 0.0003 - 1 a
dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 4 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet. d. guarantee by design, nor su bjected to production test. e. v in = input voltage to pe rform proper function. f. difference of min. and max. values. specifications (v+ = 5 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 %, v in = 0.8 v or 2.4 v e temp. a d suffix -40 c to +85c unit min. c typ. b max. c analog switch analog signal range d v analog full 0 - 5 v drain-source on-resistance r ds(on) v no or v nc = 3.5 v, v+ = 4.5 v i com = 5 ma room - 17 25 ? full - 17 35 r ds(on) match d ? r ds(on) v no or v nc = 3.5 v room - 0.4 2 r ds(on) flatness d r ds(on) flatness v no or v nc = 1 v, 2 v, and 3 v room - 3.5 6 no or nc off leakage current g i no/nc(off) v no or v nc = 1 v/4 v, v com = 4 v/1 v room -100 10 100 pa full -5000 10 5000 com off leakage current i com(off) v com = 1 v/4 v, v no or v nc = 4 v/1 v room -100 10 100 full -5000 10 5000 channel-on leakage current i com(on) v com = v no or v nc = 1 v/4 v room -200 - 200 full -10 000 - 10 000 digital control input current i inl or i inh full - 0.001 - a dynamic characteristics turn-on time t on v no or v nc = 3 v room - 32 75 ns full - - 150 turn-off time t off room - 10 50 full - - 100 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 ? room - -0.78 - pc off-isolation oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room - -80 - db crosstalk x talk room - -108 - nc and no capacitance c (off) f = 1 mhz room - 3.8 - pf channel-on capacitance c d(on) room - 7.8 - com-off capacitance c d(off) room - 3.8 - power supply positive supply range v+ 2.7 - 5.5 v power supply current i+ v+ = 5.5 v, v in = 0 v or 5.5 v - - 1 a
dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 5 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) on-resistance vs. analog voltage on-resistance vs. analog voltage leakage current vs. temperature on-resistance vs. analog voltage leakage current vs. analog voltage supply current vs. input voltage 10 100 1000 10000 0 5 10 15 20 25 30 35 012345 axis title 1st line 2nd line 2nd line r on - on-resistance ( ) v com - analog voltage (v) 2nd line v+ = 3 v v+ = 5 v t a = 25 c i no/nc = 5 ma 10 100 1000 10000 0 5 10 15 20 25 30 012345 axis title 1st line 2nd line 2nd line r on - on-resistance ( ) v com - analog voltage (v) 2nd line +85 c +25 c -40 c v+ = 5 v i no/nc = 5 ma 10 100 1000 10000 -250 -200 -150 -100 -50 0 50 100 150 -40-20 0 20406080100 axis title 1st line 2nd line 2nd line leakage current (pa) temperature (c) 2nd line i com(off) ,v com = 1 v, v no/nc = 4 v i com(on) ,v com = 4 v i no/nc(off) ,v com = 1 v, v no/nc = 4 v i no/nc(off) ,v com = 4 v, v no/nc = 1 v i com(on) ,v com = 1 v i com(off) ,v com = 4 v, v no/nc = 1 v v+ = 5 v 10 100 1000 10000 10 15 20 25 30 35 40 0 0.5 1 1.5 2 2.5 3 axis title 1st line 2nd line 2nd line r on - on-resistance () v com - analog voltage (v) 2nd line +85 c +25 c -40 c v+ = 3 v i no/nc = 5 ma 10 100 1000 10000 -250 -200 -150 -100 -50 0 50 100 012345 axis title 1st line 2nd line 2nd line eaage cent (a) v com - analog voltage (v) 2nd line i com(o) i com(on) i no/nc(o) v+ = 5 v -10 -5 0 5 10 15 20 25 30 35 40 012345 2nd line i+ - l cent ( ? a) v in - input voltage (v) 2nd line v+ = 5 v v+ = 3 v
dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 6 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) switching time vs. temperature switching threshold vs. supply voltage charge injection vs. analog voltage switching time vs. supply voltage oirr, off isolatio n vs. frequency capacitance 10 100 1000 10000 0 10 20 30 40 50 60 -40-20 0 20406080100 axis title 1st line 2nd line 2nd line t on , t off - switching time (ns) temperature (c) 2nd line v+= 3 v, t on v+= 3 v, t off v+ = 5 v, t on v+ = 5 v, t off 10 100 1000 10000 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2 2.5 3 3.5 4 4.5 5 axis title 1st line 2nd line 2nd line v t - switching threshold (v) v+ - supply voltage (v) 2nd line v ih = -40 c v il = 85 c v ih = 25 c v il = 25 c 10 100 1000 10000 -1.2 -1.1 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 012345 axis title 1st line 2nd line 2nd line q inj - charge injection (pc) v no/nc - analog voltage (v) 2nd line v+ = 3 v v+ = 5 v 10 100 1000 10000 0 10 20 30 40 50 60 70 80 2 2.5 3 3.5 4 4.5 5 axis title 1st line 2nd line 2nd line t on , t off - switching time (ns) v+ - supply voltage (v) 2nd line t on t off 10 100 1000 10000 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 100k 1m 10m 100m 1g axis title 1st line 2nd line 2nd line oirr, off isolation (db) frequency (hz) 2nd line v+ = 5 v 10 100 1000 10000 0 1 2 3 4 5 6 7 8 9 10 012345 axis title 1st line 2nd line 2nd line capacitance (pf) v analog (v) 2nd line v+ = 5 v c no/nc(off) c com(on) c com(off)
dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 7 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits fig. 1 - switching time fig. 2 - break-before-make interval fig. 3 - charge injection switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 ? v out gnd v+ 50 % 0 v 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. 0 v switch output v out =v com r l r l +r on 3 v 0.9 x v out t r < 20 ns t f < 20 ns c l (includes fixture and stray capacitance) no or nc v 1 no or nc v 2 0 v 3 v 0 v logic input switch output v o v nc = v no t r < 5 ns t f < 5 ns 90 % t d t d com 1 v+ gnd v+ c l 35 pf r l 300 ? com 2 off on on in ? v out v out q = ? v out x c l c l com r gen v out nc or no 3 v in v gen gnd v+ v+ in depends on switch configuration: input polarity determined b y sense of switch. +
dg9232e, dg9233e, dg9234e www.vishay.com vishay siliconix s16-1451-rev. a, 25-jul-16 8 document number: 75165 for technical questions, contact: analogswitchtechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits fig. 4 - off-isolation fig. 5 - channel off/on capacitance ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?75165 . in gnd nc or no 0 v, 2.4 v 10 nf com off isolation = 20 log v nc no v com r l analyzer v+ v+ com nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
vishay siliconix package information document number: 71192 11-sep-06 www.vishay.com 1 dim millimeters inches min max min max a 1.35 1.75 0.053 0.069 a 1 0.10 0.20 0.004 0.008 b 0.35 0.51 0.014 0.020 c 0.19 0.25 0.0075 0.010 d 4.80 5.00 0.189 0.196 e 3.80 4.00 0.150 0.157 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 l 0.50 0.93 0.020 0.037 q0808 s 0.44 0.64 0.018 0.026 ecn: c-06527-rev. i, 11-sep-06 dwg: 5498 4 3 1 2 5 6 8 7 h e h x 45 c all le a d s q 0.101 mm 0.004" l ba 1 a e d 0.25 mm (g a ge pl a ne) s oic (narrow): 8-lead jedec p a rt n u m b er: m s -012 s
notes: 1. die thickness allowable is 0.203 0.0127. 2. dimensioning and tolerances per ansi.y14.5m-1994. 3. dimensions ?d? and ?e 1 ? do not include mold flash or protrusions, and are measured at datum plane -h- , mold flash or protrusions shall not exceed 0.15 mm per side. 4. dimension is the length of terminal for soldering to a substrate. 5. terminal positions are shown for reference only. 6. formed leads shall be planar with respect to one another within 0.10 mm at seating plane. 7. the lead width dimension does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the lead foot. minimum space between protrusions and an adjacent lead to be 0.14 mm. see detail ?b? and section ?c-c?. 8. section ?c-c? to be determined at 0.10 mm to 0.25 mm from the lead tip. 9. controlling dimension: millimeters. 10. this part is compliant with jedec registration mo-187, variation aa and ba. 11. datums -a- and -b- to be determined datum plane -h- . 12. exposed pad area in bottom side is the same as teh leadframe pad size. 5 n n-1 a b c 0.20 (n/2) tips) 2x n/2 2 1 0.60 0.50 0.60 e top view e see detail ?b? -h- 3 d -a- seating plane a 1 a 6 c 0.10 side view 0.25 bsc 4 l -c- seating plane 0.07 r. min 2 places parting line detail ?a? (scale: 30/1) 0.48 max detail ?b? (scale: 30/1) dambar protrusion 7 c 0.08 m b s a s b b 1 with plating base metal c 1 c section ?c-c? scale: 100/1 (see note 8) see detail ?a? a 2 0.05 s c c ? 3 e 1 -b- end view e1 0.95 package information vishay siliconix document number: 71244 12-jul-02 www.vishay.com 1 msop: 8?leads jedec part number: mo-187, (variation aa and ba) n = 8l millimeters dim min nom max note a - - 1.10 a 1 0.05 0.10 0.15 a 2 0.75 0.85 0.95 b 0.25 - 0.38 8 b 1 0.25 0.30 0.33 8 c 0.13 - 0.23 c 1 0.13 0.15 0.18 d 3.00 bsc 3 e 4.90 bsc e 1 2.90 3.00 3.10 3 e 0.65 bsc e 1 1.95 bsc l 0.40 0.55 0.70 4 n 8 5 0 4 6 ecn: t-02080?rev. c, 15-jul-02 dwg: 5867
application note 826 vishay siliconix www.vishay.com document number: 72606 22 revision: 21-jan-08 application note recommended minimum pads for so-8 0.246 (6.248) recommended mi nimum pads dimensions in inches/(mm) 0.172 (4.369) 0.152 (3.861) 0.047 (1.194) 0.028 (0.711) 0.050 (1.270) 0.022 (0.559) return to index return to index
legal disclaimer notice www.vishay.com vishay revision: 13-jun-16 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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